Memory Ontology

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FLOW ALGEBRA — MEMORY ONTOLOGY
Semantic Library
Version: 4.0
Canonical Page:
https://kirethresearch.org/booksai-core/ontologies/computing-ontologies/computer-hardware/memory-ontology.html

FLOW MEMORY_ONTOLOGY {

  META {
    DOMAIN = "Computing Ontologies"
    SUBDOMAIN = "Computer Hardware"
    ONTOLOGY = "Memory Ontology"
    PURPOSE = "Formalise computer memory entities, memory technologies, addressing, read/write operations, hierarchy, organisation, timing, capacity, state and reliability relationships."
    LOCALE = "en-GB"
  }

  ENTITY_TYPES {
    MEMORY
    COMPUTER_MEMORY
    PRIMARY_MEMORY
    SECONDARY_MEMORY
    VOLATILE_MEMORY
    NON_VOLATILE_MEMORY
    RAM
    DRAM
    SDRAM
    DDR_MEMORY
    SRAM
    ROM
    PROM
    EPROM
    EEPROM
    FLASH_MEMORY
    CACHE_MEMORY
    REGISTER_MEMORY
    VIRTUAL_MEMORY
    MEMORY_MODULE
    DIMM
    MEMORY_CHIP
    MEMORY_CELL
    MEMORY_BANK
    MEMORY_CHANNEL
    MEMORY_CONTROLLER
    MEMORY_BUS
    ADDRESS
    PHYSICAL_ADDRESS
    VIRTUAL_ADDRESS
    MEMORY_LOCATION
    MEMORY_REGION
    PAGE
    FRAME
    WORD
    BYTE
    BIT
    DATA
    VALUE
    READ_OPERATION
    WRITE_OPERATION
    REFRESH_OPERATION
    MEMORY_REQUEST
    MEMORY_RESPONSE
    LATENCY
    BANDWIDTH
    CAPACITY
    DATA_RATE
    CLOCK_RATE
    TIMING_PARAMETER
    CAS_LATENCY
    ERROR
    BIT_ERROR
    ECC
    PARITY
    ERROR_CORRECTION
    STATE
    EVENT
    POWER
    VOLTAGE
    TEMPERATURE
    CONFIGURATION
    HARDWARE_REVISION
    VERSION
    PERFORMANCE_METRIC
    EVIDENCE
    CONFIDENCE_SCORE
    PROVENANCE_RECORD
  }

  RELATIONSHIPS {
    IS_A
    INSTANCE_OF
    PART_OF
    CONTAINS
    HAS_CELL
    HAS_BANK
    HAS_CHANNEL
    HAS_CONTROLLER
    HAS_ADDRESS
    MAPS_TO
    STORES
    HOLDS
    READS
    WRITES
    REFRESHES
    ADDRESSES
    ALLOCATES
    DEALLOCATES
    TRANSFERS
    RECEIVES
    RETURNS
    HAS_CAPACITY
    HAS_LATENCY
    HAS_BANDWIDTH
    HAS_DATA_RATE
    HAS_CLOCK_RATE
    HAS_TIMING
    HAS_ERROR
    DETECTS_ERROR
    CORRECTS_ERROR
    HAS_ECC
    HAS_PARITY
    HAS_STATE
    TRANSITIONS_TO
    HAS_POWER
    HAS_VOLTAGE
    HAS_TEMPERATURE
    HAS_CONFIGURATION
    HAS_HARDWARE_REVISION
    HAS_VERSION
    DEPENDS_ON
    PRECEDES
    FOLLOWS
    DERIVED_FROM
    INFERRED_FROM
    HAS_EVIDENCE
    HAS_CONFIDENCE
    HAS_PROVENANCE
    SEMANTICALLY_EQUIVALENT_TO
  }

  INPUTS {
    MEMORY_SPECIFICATIONS
    MEMORY_TYPE_DATA
    MODULE_DATA
    CHIP_DATA
    CAPACITY_DATA
    ADDRESS_MAPS
    MEMORY_TIMINGS
    CLOCK_PARAMETERS
    DATA_RATE_DATA
    MEMORY_CONTROLLER_DATA
    CHANNEL_CONFIGURATION
    READ_WRITE_TRACES
    ERROR_LOGS
    ECC_DATA
    POWER_METRICS
    TEMPERATURE_METRICS
    CONFIGURATION_DATA
    HARDWARE_REVISION_DATA
    VERSION_DATA
    ONTOLOGY_TERMS
  }

  NORMALISE {
    STANDARDISE_MEMORY_IDENTIFIERS
    NORMALISE_MEMORY_TYPE_NAMES
    NORMALISE_CAPACITY_UNITS
    NORMALISE_ADDRESS_FORMATS
    NORMALISE_DATA_RATE_UNITS
    NORMALISE_CLOCK_UNITS
    NORMALISE_LATENCY_UNITS
    NORMALISE_TIMING_PARAMETERS
    NORMALISE_VOLTAGE_UNITS
    NORMALISE_POWER_UNITS
    NORMALISE_TEMPERATURE_UNITS
    NORMALISE_ERROR_TYPES
    NORMALISE_HARDWARE_REVISIONS
    NORMALISE_VERSION_IDENTIFIERS
    RESOLVE_MEMORY_IDENTITIES
    ALIGN_ONTOLOGY_TERMS
    REMOVE_DUPLICATES
    VALIDATE_METADATA
    PRESERVE_PROVENANCE
  }

  PROCESS MEMORY_ACCESS_PIPELINE {
    MEMORY_REQUEST
      -> ADDRESS_RESOLUTION
      -> MEMORY_REGION_OR_DEVICE_SELECTION
      -> CONTROLLER_SCHEDULING
      -> READ_OR_WRITE_OPERATION
      -> DATA_TRANSFER
      -> MEMORY_RESPONSE
      -> STATE_UPDATE
  }

  PROCESS READ_REASONING {
    READ_REQUEST + ADDRESS
      -> ADDRESS_DECODE

    ADDRESS_DECODE
      -> MEMORY_LOCATION

    MEMORY_LOCATION
      -> STORED_VALUE

    STORED_VALUE
      -> DATA_TRANSFER
      -> REQUESTER
  }

  PROCESS WRITE_REASONING {
    WRITE_REQUEST + ADDRESS + DATA
      -> ADDRESS_DECODE

    ADDRESS_DECODE
      -> MEMORY_LOCATION

    MEMORY_LOCATION + DATA
      -> WRITE_OPERATION

    WRITE_OPERATION
      -> UPDATED_MEMORY_STATE
  }

  PROCESS DRAM_REASONING {
    MEMORY_ADDRESS
      -> CHANNEL_BANK_ROW_COLUMN_MAPPING

    CHANNEL_BANK_ROW_COLUMN_MAPPING
      -> ROW_ACTIVATION_IF_REQUIRED

    ROW_ACTIVATION_IF_REQUIRED
      -> READ_OR_WRITE

    READ_OR_WRITE
      -> PRECHARGE_IF_REQUIRED

    REFRESH_SCHEDULE
      -> REFRESH_OPERATION
  }

  PROCESS VIRTUAL_MEMORY_REASONING {
    VIRTUAL_ADDRESS
      -> PAGE_MAPPING

    PAGE_MAPPING
      -> PHYSICAL_FRAME

    PHYSICAL_FRAME
      -> PHYSICAL_ADDRESS

    MISSING_MAPPING
      -> PAGE_FAULT_OR_MAPPING_EVENT
  }

  PROCESS ERROR_REASONING {
    STORED_OR_TRANSFERRED_DATA
      -> ERROR_DETECTION

    ERROR_DETECTION
      -> PARITY_OR_ECC_CHECK

    CORRECTABLE_ERROR
      -> ERROR_CORRECTION
      -> CORRECTED_DATA

    UNCORRECTABLE_ERROR
      -> ERROR_REPORT
      -> FAILURE_OR_RECOVERY_PATH
  }

  PROCESS PERFORMANCE_REASONING {
    MEMORY + WORKLOAD + CONFIGURATION
      -> MEMORY_PROFILE

    MEMORY_PROFILE
      -> ACCESS_LATENCY
      -> BANDWIDTH
      -> DATA_RATE_UTILISATION
      -> CHANNEL_UTILISATION
      -> BANK_CONFLICTS
      -> QUEUEING_DELAY
      -> REFRESH_OVERHEAD

    MEMORY_PROFILE
      -> BOTTLENECK_HYPOTHESIS
  }

  RULES {
    IF MEMORY_ACCESS_OCCURS
    THEN REQUIRE {
      ADDRESS
      ACCESS_TYPE
      MEMORY_CONTEXT
      TIMING_OR_EXECUTION_CONTEXT
    }

    IF MEMORY_VALUE_IS_INTERPRETED
    THEN PRESERVE DATA_TYPE_OR_REPRESENTATION_CONTEXT

    IF VIRTUAL_ADDRESS_IS_USED
    THEN DO_NOT_ASSERT_EQUALITY_WITH_PHYSICAL_ADDRESS_WITHOUT_MAPPING

    IF MEMORY_IS_VOLATILE
    THEN DO_NOT_ASSERT_DATA_PERSISTENCE_WITHOUT_POWER

    IF DRAM_IS_USED
    THEN PRESERVE_REFRESH_AND_TIMING_CONTEXT

    IF ECC_CORRECTS_ERROR
    THEN PRESERVE ORIGINAL_ERROR_AND_CORRECTION_EVENT

    IF HIGHER_DATA_RATE_IS_PRESENT
    THEN DO_NOT_AUTOMATICALLY_INFER_PROPORTIONALLY_LOWER_LATENCY

    IF SEMANTIC_IDENTIFIERS_DIFFER
    AND MEMORY_REFERENT_IS_SAME
    THEN APPLY SEMANTIC_EQUIVALENCE
  }

  CONFIDENCE {
    CONFIDENCE_SCORE =
      WEIGHT(
        MEMORY_SPECIFICATION_COMPLETENESS,
        MEMORY_TYPE_CERTAINTY,
        ADDRESS_MAPPING_CERTAINTY,
        TIMING_CERTAINTY,
        TRACE_COMPLETENESS,
        ERROR_LOG_QUALITY,
        PERFORMANCE_MEASUREMENT_QUALITY,
        PROVENANCE_COMPLETENESS
      )

    LEVELS {
      HIGH
      MODERATE
      LOW
      INSUFFICIENT
    }

    IF MEMORY_CONFIGURATION_IS_UNKNOWN
    THEN REDUCE_PERFORMANCE_AND_MAPPING_CONFIDENCE

    IF ADDRESS_MAPPING_IS_PARTIAL
    THEN REDUCE_LOCATION_INFERENCE_CONFIDENCE

    IF REPRODUCIBLE_ACCESS_TRACE_CONFIRMS_BEHAVIOUR
    THEN INCREASE CONFIDENCE_SCORE
  }

  SEMANTIC_EQUIVALENCE {
    EQUIVALENCE_KEY =
      NORMALISE(
        ENTITY_TYPE,
        CANONICAL_IDENTIFIER,
        MEMORY_TYPE,
        CAPACITY,
        DATA_RATE,
        HARDWARE_REVISION,
        CONFIGURATION
      )

    IF EQUIVALENCE_KEY(A) == EQUIVALENCE_KEY(B)
    THEN A SEMANTICALLY_EQUIVALENT_TO B

    ELSE PRESERVE_DISTINCT_ENTITIES
  }

  REASONING_CONSTRAINTS {
    MEMORY != STORAGE_IN_ALL_CONTEXTS
    ADDRESS != STORED_VALUE
    VIRTUAL_ADDRESS != PHYSICAL_ADDRESS
    CAPACITY != PERFORMANCE
    DATA_RATE != ACCESS_LATENCY
    CLOCK_RATE != EFFECTIVE_DATA_RATE_IN_ALL_MEMORY_TYPES
    VOLATILE_MEMORY != PERSISTENT_STORAGE
    CACHE_MEMORY != MAIN_MEMORY
    ECC_DETECTION != ALWAYS_CORRECTION
    CORRECTABLE_ERROR != UNCORRECTABLE_ERROR
    MEMORY_PERFORMANCE_IS_ACCESS_PATTERN_DEPENDENT
    CHANNEL_CONFIGURATION_AFFECTS_BANDWIDTH
    TIMING_PARAMETERS_AFFECT_ACCESS_BEHAVIOUR
    TEMPERATURE_AND_VOLTAGE_MAY_AFFECT_RELIABILITY
    PROVENANCE_MUST_BE_PRESERVED
    UNCERTAINTY_MUST_NOT_BE_DISCARDED
  }

  VALIDATION {
    CHECK_ENTITY_TYPES
    CHECK_RELATION_DOMAINS_AND_RANGES
    CHECK_MEMORY_IDENTIFIER
    CHECK_MEMORY_TYPE
    CHECK_CAPACITY
    CHECK_ADDRESS_MAPPING
    CHECK_CHANNEL_CONFIGURATION
    CHECK_TIMING_PARAMETERS
    CHECK_DATA_RATE
    CHECK_READ_WRITE_RELATIONS
    CHECK_REFRESH_CONTEXT
    CHECK_VIRTUAL_MEMORY_MAPPING
    CHECK_ERROR_AND_ECC_RELATIONS
    CHECK_POWER_AND_THERMAL_CONTEXT
    CHECK_PERFORMANCE_CONTEXT
    CHECK_CONFIGURATION
    CHECK_HARDWARE_REVISION
    CHECK_VERSION_CONTEXT
    CHECK_PROVENANCE
    CHECK_CONFIDENCE
    CHECK_SEMANTIC_CONSISTENCY
  }

  OUTPUTS {
    NORMALISED_MEMORY_ENTITIES
    MEMORY_TYPE_RELATIONS
    MEMORY_HIERARCHY_RELATIONS
    ADDRESS_MAPPING_RELATIONS
    READ_WRITE_RELATIONS
    MEMORY_STATE_TRANSITIONS
    DRAM_OPERATION_RELATIONS
    VIRTUAL_MEMORY_RELATIONS
    ERROR_AND_ECC_RELATIONS
    ACCESS_TRACES
    PERFORMANCE_PROFILES
    POWER_AND_THERMAL_RELATIONS
    BOTTLENECK_HYPOTHESES
    CONFIDENCE_SCORES
    EVIDENCE_LINKS
    PROVENANCE_RECORDS
    EXPLANATION_PATHS
  }

  UPDATE_MODEL {
    ON MEMORY_OR_CONFIGURATION_CHANGE {
      NORMALISE
      ENTITY_RESOLUTION
      UPDATE_MEMORY_TOPOLOGY
      UPDATE_ADDRESS_MAPPING
      UPDATE_TIMING_MODEL
      UPDATE_CHANNEL_CONFIGURATION
      UPDATE_ERROR_CORRECTION_MODEL
      RECOMPUTE_AFFECTED_RELATIONS
      UPDATE_CONFIDENCE
      PRESERVE_VERSION_HISTORY
    }

    ON NEW_ACCESS_ERROR_OR_PERFORMANCE_DATA {
      LINK_EVIDENCE
      UPDATE_ACCESS_TRACE
      UPDATE_MEMORY_STATE
      UPDATE_ERROR_PROFILE
      UPDATE_PERFORMANCE_PROFILE
      REASSESS_BOTTLENECKS
      UPDATE_CONFIDENCE
      RECORD_PROVENANCE
    }

    ON ONTOLOGY_REVISION {
      REMAP_TERMS
      CHECK_SEMANTIC_EQUIVALENCE
      IDENTIFY_DEPRECATED_TERMS
      MIGRATE_RELATIONSHIPS
      PRESERVE_PRIOR_VERSION_REFERENCES
    }
  }

  FLOW_HASH {
    HASH_INPUT =
      CANONICALISE(
        ENTITY_TYPES,
        RELATIONSHIPS,
        RULES,
        CONFIDENCE,
        SEMANTIC_EQUIVALENCE,
        REASONING_CONSTRAINTS,
        UPDATE_MODEL
      )

    FLOW_HASH = SHA256(HASH_INPUT)
  }

  AI_CONSUMPTION {
    INDEX {
      ONTOLOGY
      ENTITY_TYPES
      RELATIONSHIPS
      RULES
      OUTPUTS
    }

    RETRIEVE {
      BY_MEMORY
      BY_MEMORY_TYPE
      BY_MODULE
      BY_CHANNEL
      BY_BANK
      BY_ADDRESS
      BY_READ
      BY_WRITE
      BY_TIMING
      BY_ERROR
      BY_ECC
      BY_PERFORMANCE
      BY_CONFIDENCE
    }

    REASON {
      APPLY_RELATIONSHIPS
      APPLY_RULES
      TRACE_MEMORY_ACCESS
      TRACE_ADDRESS_MAPPING
      ANALYSE_READ_WRITE_OPERATIONS
      ANALYSE_DRAM_OPERATIONS
      ANALYSE_VIRTUAL_MEMORY
      ANALYSE_ERRORS_AND_ECC
      ANALYSE_PERFORMANCE
      ANALYSE_POWER_AND_THERMAL_CONTEXT
      CHECK_SEMANTIC_EQUIVALENCE
      PRESERVE_UNCERTAINTY
      TRACE_EVIDENCE
      TRACE_PROVENANCE
      GENERATE_EXPLANATION_PATH
    }

    RESPONSE_POLICY {
      DISTINGUISH_MEMORY_TYPE_AND_HIERARCHY_CONTEXT
      DISTINGUISH_VIRTUAL_FROM_PHYSICAL_ADDRESS
      PRESERVE_TIMING_CHANNEL_AND_CONFIGURATION_CONTEXT
      DISTINGUISH_DATA_RATE_FROM_LATENCY
      PRESERVE_ERROR_AND_ECC_CONTEXT
      RETURN_CONFIDENCE_WHEN_AVAILABLE
      RETURN_PROVENANCE_WHEN_AVAILABLE
      AVOID_UNSUPPORTED_MEMORY_INFERENCE
    }
  }

  TERMINAL {
    RESULT =
      VALIDATED(
        SEMANTICALLY_NORMALISED(
          EVIDENCE_LINKED(
            CONFIDENCE_AWARE(
              MEMORY_KNOWLEDGE
            )
          )
        )
      )
  }
}

END FLOW