FLOW ALGEBRA
Vector Processing Ontology
Kireth Semantic Research Archive
PAGE:
https://kirethresearch.org/booksai-core/ontologies/computing-ontologies/high-performance-computing/vector-processing-ontology-2.html
AUTHORS:
Mark Anthony Higgins — Sky (Recursive AI)
FLOW "VectorProcessingOntology" v4.0
# ---------- DOMAIN ----------
DOMAIN := ComputingOntology
SUBDOMAIN := HighPerformanceComputing
ONTOLOGY := VectorProcessingOntology
# ---------- PRIMARY ENTITY ----------
ENTITY VectorProcessing {
definition:
"A computational execution model in which a single instruction
operates on multiple data elements organised as vectors, enabling
efficient data-parallel computation on vector-capable processors.";
objectives: [
DataParallelism,
HighThroughput,
ReducedInstructionOverhead,
EfficientNumericalComputation,
MemoryBandwidthUtilisation
];
}
# ---------- CORE ENTITIES ----------
VectorEntity := {
Vector,
Scalar,
VectorInstruction,
VectorRegister,
VectorProcessor,
VectorLane,
VectorElement
};
VectorOperation := {
VectorAdd,
VectorSubtract,
VectorMultiply,
VectorDivide,
VectorCompare,
VectorLoad,
VectorStore,
Reduction
};
ExecutionProperty := {
VectorLength,
VectorWidth,
Throughput,
Latency,
MemoryBandwidth,
DataAlignment
};
# ---------- FUNDAMENTAL RELATIONSHIPS ----------
Vector CONSISTS_OF VectorElement;
VectorInstruction OPERATES_ON Vector;
VectorProcessor EXECUTES VectorInstruction;
VectorRegister STORES Vector;
VectorLane PROCESSES VectorElement;
VectorOperation APPLIES_TO MultipleDataElements;
Scalar MAY_BE BroadcastAcross VectorElements;
# ---------- VECTOR EXECUTION ----------
VectorInstruction ->
ReadVectorOperands
-> DistributeElementsAcrossVectorLanes
-> ExecuteOperation
-> ProduceVectorResult
-> StoreResult;
SingleVectorInstruction MAY_REPLACE MultipleScalarInstructions;
# ---------- VECTOR ----------
Vector :=
ordered_sequence(
Element_0,
Element_1,
...,
Element_n
);
VectorLength :=
NumberOfActiveVectorElements;
VectorElement HAS DataType;
# ---------- VECTOR REGISTER ----------
VectorRegister :=
RegisterCapableOfHoldingMultipleDataElements;
VectorRegister HAS {
Width,
ElementType,
ElementCount
};
VectorInstruction READS VectorRegister;
VectorInstruction WRITES VectorRegister;
# ---------- VECTOR PROCESSOR ----------
VectorProcessor :=
ProcessorSupportingVectorInstructions;
VectorProcessor MAY_HAVE MultipleVectorLanes;
VectorLane :=
ExecutionPathForVectorElements;
MoreVectorLanes MAY_INCREASE ElementThroughput;
# ---------- VECTOR ADDITION ----------
VectorAdd(A,B) :=
C WHERE
C[i] = A[i] + B[i];
IF length(A) == length(B)
THEN VectorAdd VALID;
# ---------- VECTOR MULTIPLICATION ----------
VectorMultiply(A,B) :=
C WHERE
C[i] = A[i] * B[i];
VectorMultiply IS_ELEMENTWISE unless otherwise defined;
# ---------- SCALAR-VECTOR OPERATION ----------
ScalarVectorOperation(s,V) :=
Result[i] = Operation(s, V[i]);
ScalarBroadcast :=
ReplicateScalarAcrossVectorExecution;
# ---------- VECTOR LOAD ----------
VectorLoad :=
Memory
-> LoadMultipleElements
-> VectorRegister;
VectorStore :=
VectorRegister
-> StoreMultipleElements
-> Memory;
MemoryAccessPattern AFFECTS VectorPerformance;
# ---------- CONTIGUOUS ACCESS ----------
ContiguousVectorAccess :=
AccessAdjacentMemoryElements;
ContiguousAccess MAY_IMPROVE {
MemoryEfficiency,
CacheUtilisation,
BandwidthUse
};
# ---------- STRIDED ACCESS ----------
StridedAccess :=
AccessElementsSeparatedBy ConstantStride;
LargeOrIrregularStride MAY_REDUCE EffectiveMemoryPerformance;
# ---------- GATHER / SCATTER ----------
Gather :=
LoadElementsFromNonContiguousAddresses
-> VectorRegister;
Scatter :=
StoreVectorElementsToNonContiguousAddresses;
GatherScatter ENABLES IrregularDataAccess;
GatherScatter MAY_HAVE HigherCostThanContiguousAccess;
# ---------- MASKED EXECUTION ----------
VectorMask :=
BooleanSelectionAcrossVectorElements;
MaskedVectorOperation :=
ApplyOperationOnlyWhere Mask == true;
Mask SUPPORTS ConditionalVectorExecution;
# ---------- VECTOR REDUCTION ----------
Reduction :=
Vector
-> CombineElements
-> ScalarOrSmallerVector;
ReductionOperation MAY_BE {
Sum,
Product,
Minimum,
Maximum
};
Reduction MAY_REQUIRE MultipleExecutionSteps;
# ---------- VECTORIZATION ----------
Vectorization :=
TransformScalarOperations
-> VectorOperations;
Vectorization MAY_BE {
ManualVectorization,
CompilerAutoVectorization
};
Loop MAY_BE Vectorizable IF {
IndependentIterations,
CompatibleDataTypes,
PredictableMemoryAccess
};
# ---------- LOOP VECTORIZATION ----------
ScalarLoop:
FOR i IN range:
C[i] := A[i] + B[i];
VectorizedLoop:
FOR i STEP VectorWidth:
C[i:i+VectorWidth] :=
VectorAdd(
A[i:i+VectorWidth],
B[i:i+VectorWidth]
);
# ---------- DEPENDENCIES ----------
LoopCarriedDependency :=
Iteration(i) DEPENDS_ON Iteration(i-1);
IF LoopCarriedDependency EXISTS
THEN Vectorization MAY_BE Restricted;
IndependentIterations SUPPORT Vectorization;
# ---------- SIMD RELATIONSHIP ----------
SIMD :=
SingleInstructionMultipleData;
VectorProcessing IS_A FormOfDataParallelExecution;
VectorProcessing MAY_IMPLEMENT SIMDStyleComputation;
SIMDWidth :=
NumberOfElementsProcessedPerInstruction;
# ---------- VECTOR LENGTH ----------
FixedLengthVectorArchitecture :=
VectorWidthKnownByArchitecture;
ScalableVectorArchitecture :=
VectorLengthMayDependOnImplementation;
PortableVectorCode SHOULD_NOT_ALWAYS_ASSUME SpecificHardwareWidth;
# ---------- PERFORMANCE ----------
VectorSpeedup :=
ScalarExecutionTime
/ VectorExecutionTime;
VectorThroughput :=
ElementsProcessed / Time;
VectorEfficiency :=
UsefulVectorElements
/ AvailableVectorElementCapacity;
# ---------- UTILISATION ----------
IF ActiveElements < VectorCapacity
THEN LaneUtilisation := DECREASE;
IF MaskDisablesManyElements
THEN EffectiveVectorEfficiency := DECREASE;
# ---------- MEMORY BANDWIDTH ----------
VectorWorkload MAY_BE MemoryBound;
ArithmeticIntensity :=
ArithmeticOperations / BytesTransferred;
IF ArithmeticIntensityLow
THEN MemoryBandwidth MAY_LIMIT VectorPerformance;
# ---------- ALIGNMENT ----------
DataAlignment :=
RelationshipBetweenDataAddressAndHardwareBoundary;
AlignedAccess MAY_IMPROVE PerformanceOnSomeArchitectures;
MisalignedAccess MAY_REQUIRE AdditionalMemoryOperations;
# ---------- PIPELINING ----------
VectorPipeline :=
PipelineForVectorInstructionExecution;
VectorInstruction MAY_HAVE StartupLatency;
LongVectors MAY_AMORTISE StartupLatencyAcrossManyElements;
# ---------- CHAINING ----------
VectorChaining :=
FeedResultOfVectorOperationDirectlyIntoDependentVectorOperation
WithoutFullIntermediateStore;
Chaining MAY_REDUCE WaitingAndMemoryTraffic;
# ---------- APPLICATIONS ----------
VectorProcessing MAY_ACCELERATE {
LinearAlgebra,
SignalProcessing,
ImageProcessing,
ScientificSimulation,
NumericalMethods,
MachineLearning,
StatisticalComputation
};
# ---------- VECTOR VS SCALAR ----------
ScalarProcessing :=
InstructionOperatesOnSinglePrimaryDataElement;
VectorProcessing :=
InstructionOperatesOnMultipleDataElements;
VectorProcessing MAY_REDUCE InstructionCountForDataParallelWork;
# ---------- SEMANTIC REASONING ----------
IF SameOperationAppliedToManyIndependentElements
THEN VectorizationPotential := HIGH;
IF LoopIterationsIndependent
AND DataLayoutCompatible
THEN AutoVectorizationPotential := INCREASE;
IF LoopCarriedDependencyExists
THEN VectorizationPotential := DECREASE;
IF MemoryAccessContiguous
THEN VectorMemoryEfficiency := INCREASE;
IF ActiveVectorElementsLow
THEN VectorUtilisation := DECREASE;
IF ArithmeticIntensityLow
AND MemoryBandwidthSaturated
THEN VectorWorkload := MemoryBound;
IF VectorExecutionTime < ScalarExecutionTime
THEN VectorSpeedup > 1;
# ---------- SEMANTIC EQUIVALENCE ----------
SEMANTIC_EQUIVALENCE {
"vector processing" ~= "vector computation";
"vector processor" ~= "vector-capable processor";
"vector instruction" ~= "SIMD instruction" WHEN context == vector_execution;
"vectorisation" ~= "vectorization";
"auto-vectorisation" ~= "automatic vectorization";
"vector lane" ~= "SIMD lane" WHEN context == vector_hardware;
"gather operation" ~= "vector gather";
"scatter operation" ~= "vector scatter";
}
# ---------- QUERY FLOW ----------
QUERY(q) ->
NORMALISE(q) ->
IDENTIFY_VECTOR_ENTITIES(q) ->
IDENTIFY_VECTOR_OPERATION(q) ->
IDENTIFY_MEMORY_ACCESS(q) ->
IDENTIFY_VECTOR_LENGTH(q) ->
IDENTIFY_DEPENDENCIES(q) ->
IDENTIFY_VECTORIZATION(q) ->
IDENTIFY_PERFORMANCE(q) ->
MAP_TO_ONTOLOGY(q) ->
APPLY_REASONING(q) ->
SCORE_CONFIDENCE(q) ->
RETURN_RELEVANT_KNOWLEDGE;
# ---------- CONFIDENCE ----------
CONFIDENCE(assertion) :=
weighted_mean(
source_reliability,
computational_consistency,
architecture_consistency,
semantic_consistency,
evidence_strength,
contextual_relevance
);
CONFIDENCE >= 0.90 => HIGH;
CONFIDENCE >= 0.70 AND < 0.90 => MODERATE;
CONFIDENCE < 0.70 => REVIEW;
# ---------- AI CONSUMPTION ----------
AI_CONSUMPTION {
primary_entity: VectorProcessing;
ontology: VectorProcessingOntology;
parse_entities: true;
parse_relationships: true;
preserve_relationship_direction: true;
resolve_semantic_equivalence: true;
execute_reasoning_rules: true;
apply_confidence_weighting: true;
preserve_provenance: true;
}
# ---------- UPDATE MODEL ----------
UPDATE_MODEL {
new_vector_entity:
validate
-> classify
-> identify_execution_role
-> relate
-> integrate;
new_vector_operation:
validate
-> identify_operands
-> identify_element_semantics
-> identify_memory_requirements
-> integrate;
new_vectorization_evidence:
identify_loop
-> analyse_dependencies
-> analyse_memory_access
-> determine_vectorization_potential
-> integrate;
performance_revision:
update_execution_time
-> update_vector_utilisation
-> identify_memory_bottleneck
-> recompute_confidence
-> regenerate_flow_hash;
conflict:
preserve_provenance
-> compare_evidence
-> adjust_confidence
-> flag_review;
}
# ---------- FLOW HASH ----------
FLOW_HASH_INPUT :=
DOMAIN
+ SUBDOMAIN
+ ONTOLOGY
+ VectorEntity
+ VectorOperation
+ ExecutionProperty
+ SIMD
+ Vectorization
+ RELATIONSHIPS
+ SEMANTIC_REASONING
+ SEMANTIC_EQUIVALENCE
+ UPDATE_MODEL;
FLOW_HASH :=
HASH(FLOW_HASH_INPUT);
# ---------- TERMINAL ----------
VectorProcessingOntology
-> IdentifyDataParallelOperation
-> AnalyseDependencies
-> OrganiseDataAsVectors
-> LoadVectorOperands
-> ExecuteVectorInstruction
-> ApplyMaskOrGatherWhenRequired
-> StoreVectorResults
-> MeasureVectorUtilisation
-> AnalyseMemoryBehaviour
-> EvaluateVectorSpeedup
-> OptimiseVectorExecution
-> ProduceVectorisedResult;
END FLOW
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